Freescale-semiconductor MCF5480 Instrukcja Użytkownika Pobierz pdf (Strona 103)

MCF548x Reference Manual, Rev. 3

Freescale Semiconductor i

Part I

Processor Core

Part I is intended for system designers who need to understand the operation of the MCF548x ColdFire

core and its enhanced multiply/accumulate (EMAC) execution unit. It describes the programming and

exception models, Harvard memory implementation, and debug module.

Contents

Part 1 contains the following chapters:

• Chapter 3, “ColdFire Core,” provides an overview of the microprocessor core of the MCF548x.

The chapter begins with a description of enhancements from the V3 ColdFire core, and then fully

describes the V4e programming model as it is implemented on the MCF548x. It also includes a full

description of exception handling, data formats, an instruction set summary, and a table of

instruction timings.

• Chapter 4, “Enhanced Multiply-Accumulate Unit (EMAC),” describes the MCF548x enhanced

multiply/accumulate unit, which executes integer multiply, multiply-accumulate, and

miscellaneous register instructions. The EMAC is integrated into the operand execution pipeline

(OEP).

• Chapter 5, “Memory Management Unit (MMU),” describes the ColdFire virtual memory

management unit (MMU), which provides virtual-to-physical address translation and memory

access control.

• Chapter 6, “Floating-Point Unit (FPU),” describes instructions implemented in the floating-point

unit (FPU) designed for use with the ColdFire family of microprocessors.

• Chapter 7, “Local Memory,” describes the MCF548x implementation of the ColdFire V4e local

memory specification.

• Chapter 8, “Debug Support,” describes the Revision C enhanced hardware debug support in the

MCF54

8x. This revision of the ColdFire debug architecture encompasses earlier revisions.

1 2 ... 98 99 100 101 102 103

Brak uwag

Freescale-semiconductor MCF5480 Instrukcja Użytkownika Strona 103