Freescale-semiconductor MC68HC08KH12 Instrukcja Użytkownika Strona 85

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MC68HC(7)08KH12Rev. 1.1 Advance Information
Freescale Semiconductor
85
POR — Power-On Reset Bit
1 = Last reset caused by POR circuit
0 = Read of RSR
PIN — External Reset Bit
1 = Last reset caused by external reset pin (RST)
0 = POR or read of RSR
COP — Computer Operating Properly Reset Bit
1 = Last reset caused by COP counter
0 = POR or read of RSR
ILOP — Illegal Opcode Reset Bit
1 = Last reset caused by an illegal opcode
0 = POR or read of RSR
ILAD — Illegal Address Reset Bit (opcode fetches only)
1 = Last reset caused by an opcode fetch from an illegal
address
0 = POR or read of RSR
USB —Universal Serial Bus Reset Bit
1 = Last reset caused by an USB module
0 = POR or read of RSR
7.8.3 Break Flag Control Register (BFCR)
The break control register contains a bit that enables software to clear
status bits while the MCU is in a break state.
Address: $FE03
Bit 7654321Bit 0
Read:
BCFERRRRRRR
Write:
Reset:00000000
R= Reserved
Figure 7-22. Break Flag Control Register (BFCR)
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